1. Field of the Invention
The present invention relates generally to the field of computer systems, and in particular to methods and mechanisms for utilizing cache hints.
2. Description of the Related Art
As memory requests move through a system on chip (SoC) fabric, a cache hint mechanism may be implemented such that an agent generating a memory request may also provide information representing the cacheability information associated with that request. However, a SoC may include multiple different domains with different protocols, and cache hints generated in one domain may not be properly recognized or acted upon in other domains.
In these scenarios, with a SoC that has multiple protocols that are used by its various components, the problem of communicating and sharing cacheability information across components is encountered. Therefore, it can be challenging to convey the appropriate cache hint information from a legacy component that is compliant with a first protocol to a memory subsystem that is compliant with a second protocol.